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conference paper

Output-Capacitance Hysteresis Losses of Field-Effect Transistors

Perera, Nirmana  
•
Jafari, Armin
•
Nela, Luca
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November 12, 2020
2020 IEEE 21st Workshop on Control and Modeling for Power Electronics (COMPEL)
2020 IEEE 21st Workshop on Control and Modeling for Power Electronics (COMPEL)

Resonant-type power converters are supposed to generate zero switching losses during soft-switching operation. In recent research, unexpected switching losses were reported in these converters, which were attributed to a large-signal hysteresis observed in the output-charge versus voltage (QV) characteristics of the power device. Since these converters subject the power semiconductor switch to different levels of peak voltages based on design requirements, the dependence of hysteresis losses on the voltage range is important. In this work, planar-Si, Si super-junction, SiC and GaN power device structures are investigated, and categorized based on their QV patterns. We report that for different device technologies, the large-signal hysteresis patterns of output charge show diverse dependencies on the excitation voltage amplitude. The frequency dependence of the hysteresis losses is also analysed and discussed. The presented results provide important insights in identifying the root causes for output-charge hysteresis, and may help to improve device spice models to properly account for soft-switching losses.

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EPFL-NP_COMPEL2020_Infoscience.pdf

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Accepted version

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openaccess

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