Customizable processors—which allowed their instruction set architecture (ISA) to be augmented with applicationspecific custom instruction set extensions (ISEs)—arrived on the market at the turn of the millenium. Commercial offerings included the Tensilica Xtensa [1], ARC ARCtangent [2], STMicroelectronics ST200 [3] and MIPS with CorExtend [4]. Academic researchers developed compiler techniques to extract application-specific ISEs directly from high-level software source code, synthesize them in hardware, and integrate them into an extensible ISA. An early example of this work was a paper published by two of the authors in the Proceedings of the 14th International Conference on Application-specific Systems, Architectures and Processors (ASAP) in 2003 [5]. This short retrospective looks back at some of the work of those years, reflects on why the topic all but disappeared from the research scene without producing any lasting industrial impact, and wonders about persisting threads of these efforts that may exist within the RISC-V ecosystem.