Complementary metal oxide semiconductor (CMOS) image sensors are more compatible than charge coupled devices (CCDs) for lab-on-a-chip platforms due to their inherited advantages. However, without the noise reduction circuits, CMOS technology wouldn’t be able to compete with CCDs. Today, correlated double sampling circuits (CCDs) are used in all CMOS imagers in order to remove the reset noise and the fixed pattern noise. However, these circuits immensely decrease the fill factor of the image sensors because of their large area and their requirement of extra circuitries in order to convert their single ended outputs to differential outputs. In this paper, we propose a CDS architecture convenient for CMOS imagers that uses switched capacitor fully differential configuration which reduces the noise in the same way as the conventional CDS architectures while decreasing the area and increasing the fill factor.