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  4. Design and Integration of All-Silicon Fiber-Optic Receivers for Multi-Gigabit Chip-to-Chip Links
 
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Design and Integration of All-Silicon Fiber-Optic Receivers for Multi-Gigabit Chip-to-Chip Links

Muller, Paul  
•
Emsley, Matthew K.
•
Tajalli, Armin  
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2006
proceedings of the 32nd European Solid-State Circuits Conference (ESSCIRC)
32nd European Solid-State Circuits Conference (ESSCIRC)

This paper presents a top-down approach to the design of all-silicon CMOS-based fully integrated optical receivers. From the system-level requirements, we determine the optimum block-level specifications, based on which the individual building blocks are designed. Measurement results of the manufactured design show operation at data rates exceeding 2.5-Gbps/channel for the detector, the amplification and the clock and data recovery circuits. This proof of concept is the first step towards design optimized, completely integrated, multi-channel optical receivers for high-bandwidth short-distance chip-to-chip interconnects.

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06_ESSCIRC_TRX_Muller.pdf

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openaccess

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