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  4. 15.5 Cryo-CMOS circuits and systems for scalable quantum computing
 
conference paper

15.5 Cryo-CMOS circuits and systems for scalable quantum computing

Charbon, Edoardo  
•
Sebastiano, Fabio
•
Babaie, Masoud
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March 6, 2017
2017 IEEE International Solid-State Circuits Conference (ISSCC)
2017 IEEE International Solid-State Circuits Conference (ISSCC)

Quantum computing holds the promise to achieve unprecedented computation power and to solve problems today intractable. State-of-the-art quantum processors consist of arrays of quantum bits (qubits) operating at a very low base temperature, typically a few tens of mK, as shown in Fig. 15.5.1 The qubit states degrade naturally after a certain time, upon loss of quantum coherence. For proper operation, an error-correcting loop must be implemented by a classical controller, which, in addition of handling execution of a quantum algorithm, reads the qubit state and performs the required corrections. However, while few qubits (~10) in today's quantum processors can be easily connected to a room-temperature controller, it appears extremely challenging, if not impossible, to manage the thousands of qubits required in practical quantum algorithms [1].

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Type
conference paper
DOI
10.1109/ISSCC.2017.7870362
Author(s)
Charbon, Edoardo  
Sebastiano, Fabio
Babaie, Masoud
Vladimirescu, Andrei
Shahmohammadi, Mina
Staszewski, Robert Bogdan
Homulle, Harald A.R.
Patra, Bishnu
van Dijk, Jeroen P.G.
Incandela, Rosario M.
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Date Issued

2017-03-06

Published in
2017 IEEE International Solid-State Circuits Conference (ISSCC)
Start page

264

End page

265

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
AQUA  
Event nameEvent placeEvent date
2017 IEEE International Solid-State Circuits Conference (ISSCC)

San Francisco, CA, USA

February 5-9, 2017

Available on Infoscience
August 13, 2018
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/147746
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