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book part or chapter

Understanding NVIDIA GPGPU Hardware

Maitre, Ogier Philippe  
Tsutsui, Shigeyoshi
•
Collet, Pierre
2013
Massively Parallel Evolutionary Computation on GPGPUs

This chapter presents NVIDIA general purpose graphical processing unit (GPGPU) architecture, by detailing both hardware and software concepts. The evolution of GPGPUs from the beginning to the most modern GPGPUs is presented in order to illustrate the trends that motivate the changes that occurred during this evolution. This allows us to anticipate future changes as well as to identify the stable features on which programmers can rely. This chapter starts with a brief history of these chips, then details architectural elements such as the GPGPU core structuration, the memory hierarchy and the hardware scheduling. Software concepts are also presented such as thread organization and correct usage of scheduling.

  • Details
  • Metrics
Type
book part or chapter
DOI
10.1007/978-3-642-37959-8_2
Author(s)
Maitre, Ogier Philippe  
Editors
Tsutsui, Shigeyoshi
•
Collet, Pierre
Date Issued

2013

Publisher

Springer Berlin Heidelber

Published in
Massively Parallel Evolutionary Computation on GPGPUs
ISBN of the book

978-3-642-37959-8

Start page

15

End page

34

Series title/Series vol.

Natural Computing Series

Subjects

GPGPU

•

Evolutionary Algorithm

•

Genetic programing

•

CUDA

•

Artificial Intelligence

Written at

EPFL

EPFL units
LAC  
Available on Infoscience
March 13, 2014
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/101771
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