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  4. SoK: Shining Light on Shadow Stacks
 
conference paper

SoK: Shining Light on Shadow Stacks

Burow, Nathan
•
Zhang, Xinping
•
Payer, Mathias  
January 1, 2019
2019 Ieee Symposium On Security And Privacy (Sp 2019)
40th IEEE Symposium on Security and Privacy (SP)

Control-Flow Hijacking attacks are the dominant attack vector against C/C++ programs. Control-Flow Integrity (CFI) solutions mitigate these attacks on the forward edge, i.e., indirect calls through function pointers and virtual calls. Protecting the backward edge is left to stack canaries, which are easily bypassed through information leaks. Shadow Stacks are a fully precise mechanism for protecting backwards edges, and should be deployed with CFI mitigations.

We present a comprehensive analysis of all possible shadow stack mechanisms along three axes: performance, compatibility, and security. For performance comparisons we use SPEC CPU2006, while security and compatibility are qualitatively analyzed. Based on our study, we renew calls for a shadow stack design that leverages a dedicated register, resulting in low performance overhead, and minimal memory overhead, but sacrifices compatibility. We present case studies of our implementation of such a design, Shadesmar, on Phoronix and Apache to demonstrate the feasibility of dedicating a general purpose register to a security monitor on modern architectures, and Shadesmar's deployability. Our comprehensive analysis, including detailed case studies for our novel design, allows compiler designers and practitioners to select the correct shadow stack design for different usage scenarios.

Shadow stacks belong to the class of defense mechanisms that require metadata about the program's state to enforce their defense policies. Protecting this metadata for deployed mitigations requires in-process isolation of a segment of the virtual address space. Prior work on defenses in this class has relied on information hiding to protect metadata. We show that stronger guarantees are possible by repurposing two new Intel x86 extensions for memory protection (MPX), and page table control (MPK). Building on our isolation efforts with MPX and MPK, we present the design requirements for a dedicated hardware mechanism to support intra-process memory isolation, and discuss how such a mechanism can empower the next wave of highly precise software security mitigations that rely on partially isolated information in a process.

  • Details
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Type
conference paper
DOI
10.1109/SP.2019.00076
Web of Science ID

WOS:000510006100059

Author(s)
Burow, Nathan
Zhang, Xinping
Payer, Mathias  
Date Issued

2019-01-01

Publisher

IEEE COMPUTER SOC

Publisher place

Los Alamitos

Published in
2019 Ieee Symposium On Security And Privacy (Sp 2019)
ISBN of the book

978-1-5386-6660-9

Series title/Series vol.

IEEE Symposium on Security and Privacy

Start page

985

End page

999

Subjects

Computer Science, Theory & Methods

•

Engineering, Electrical & Electronic

•

Computer Science

•

Engineering

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

EPFL units
HEXHIVE  
Event nameEvent placeEvent date
40th IEEE Symposium on Security and Privacy (SP)

San Francisco, CA

May 19-23, 2019

Available on Infoscience
February 22, 2020
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/166443
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