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research article

Room-Temperature Negative Differential Resistance in Graphene Field Effect Transistors: Experiments and Theory

Sharma, Pankaj  
•
Bernard, Laurent Syavoch  
•
Bazigos, Antonios  
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2015
ACS Nano

In this paper we demonstrate experimentally and discuss the negative differential resistance (NDR) in dual-gated graphene field effect transistors (GFETs) at room temperature for various channel lengths, ranging from 200 nm to 5 mu m. The GFETs were fabricated using chemically vapor-deposited graphene with a top gate oxide down to 2.5 nm of equivalent oxide thickness (EOT). We originally explain and demonstrate with systematic simulations that the onset of NDR occurs in the unipolar region itself and that the main mechanism behind NDR is associated with the competition between the specific field dependence of carrier density and the drift velocity in GFET. Finally, we show experimentally that NDR behavior can still be obtained with devices of higher EOTs; however, this comes at the cost of requiring higher bias values and achieving lower NDR level.

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Type
research article
DOI
10.1021/nn5059437
Web of Science ID

WOS:000348619000066

Author(s)
Sharma, Pankaj  
Bernard, Laurent Syavoch  
Bazigos, Antonios  
Magrez, Arnaud  
Ionescu, Adrian M.  
Date Issued

2015

Publisher

Amer Chemical Soc

Published in
ACS Nano
Volume

9

Issue

1

Start page

620

End page

625

Subjects

graphene

•

field effect transistor

•

negative differential resistance

•

chemical vapor deposition

Editorial or Peer reviewed

REVIEWED

Written at

EPFL

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LPMC  
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Available on Infoscience
December 31, 2014
Use this identifier to reference this record
https://infoscience.epfl.ch/handle/20.500.14299/109864
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