van Staveren, JobPadalia, Pinakin M.Charbon, EdoardoAlmudever, Carmen G.Scappucci, GiordanoBabaie, MasoudSebastiano, Fabio2024-05-162024-05-162024-05-162024-04-0310.1109/JSSC.2024.3378768https://infoscience.epfl.ch/handle/20.500.14299/207933WOS:001201938400001This article presents a family of sub-1-V, fully-CMOS voltage references adopting MOS devices in weak inversion to achieve continuous operation from room temperature (RT) down to cryogenic temperatures. Their accuracy limitations due to curvature, body effect, and mismatch are investigated and experimentally validated. Implemented in 40-nm CMOS, the references show a line regulation better than 2.7%/V from a supply as low as 0.99 V. By applying dynamic element matching (DEM) techniques, a spread of 1.2% (3 sigma ) from 4.2 to 300 K can be achieved, resulting in a temperature coefficient (TC) of 111 ppm/K. As the first significant statistical characterization extending down to cryogenic temperatures, the results demonstrate the ability of the proposed architectures to work under cryogenic harsh environments, such as space-and quantum-computing applications.TechnologyCryogenicsTemperature DistributionResistorsQuantum ComputingLogic GatesThreshold VoltageMosfetBody EffectCryogenic Cmos (Cryo-Cmos)DtmosExtreme EnvironmentMos-BasedVoltage Referencestext::journal::journal article::research article