Han, Hung-ChiZhao, ZhixingLehmann, SteffenCharbon, EdoardoEnz, Christian2024-02-212024-02-212024-02-212024-01-0110.1109/LED.2023.3331022https://infoscience.epfl.ch/handle/20.500.14299/204983WOS:001134459600012The transistor compact model is crucial but has yet to mature for cryogenic electronics. This paper presents a sophisticated analytical model of the MOSFET subthreshold current at cryogenic temperatures, accounting for the thermionic, hopping, source-to-drain tunneling transports, and the Gaussian-distributed interface traps to bridge the gap. Hopping and source-to-drain tunneling transports can co-exist in the subthreshold regime, leading to subthreshold saturation strongly correlated to channel length and drain voltages.TechnologyCryo-CmosBand TailFdsoiHoppingModelingQuantum ComputingSubthresholdTunnelingtext::journal::journal article::research article