Ferraris, AlbertoCha, EunjungOlziersky, AntonisSousa, MarilyneHan, Hung-ChiCharbon, EdoardoMoselund, Kirsten EmilieZota, Cezar2025-08-202025-08-19202510.23919/VLSITechnologyandCir65189.2025.110751542-s2.0-105012169871https://infoscience.epfl.ch/handle/20.500.14299/252943In this work we demonstrate cryogenic InxGa1-xAs/InP HEMTs with highly scaled gate footprints, down to 380 × 40 nm2 for a single gate finger, and investigate the impact of footprint scaling on device performance. The 80% In channel devices show fT=622 GHz and fMAX=733 GHz together with a noise indication factor √ID/gm=0.17 √V·mm/S at 4 K, which is a record-high combination of high-frequency and low-noise performance. The performance is enabled by heterostructure engineering, resulting in ultra-low RON=250 Ω·μ m together with a minimum subthreshold swing SS < 10 mV/decade. These results show that cryogenic III-V HEMT technology can provide excellent performance at scaled footprints for readout in future high-density quantum systems.enfalsetext::conference output::conference proceedings::conference paper