Automatic wire modeling to explore novel FPGA architectures

Zgheib, GraceIenne, Paolo2023-01-202023-01-202023-01-20201610.1109/FPT.2016.7929528https://infoscience.epfl.ch/handle/20.500.14299/194141Automatic wire modeling to explore novel FPGA architecturestext::conference output::conference proceedings::conference paper