Margot, F.Voelkle, F.Liebling, Th. M.Bottazzi, F.Prodon, A.2006-02-132006-02-132006-02-131988https://infoscience.epfl.ch/handle/20.500.14299/222551In this paper we present an application of simulated annealing to the detailed routing of integrated circuits. This application is based on local modifications to a simple, but generally inacceptable, initial configuration. The new configurations so generated are evaluated through a cost function incorporating strong penalties for the illegal situations. The results are satisfactory, but we are still studying the algorithm behaviour as a function of its parameters.text::journal::journal article::research article