An Automated Testing and Debugging Toolkit for Gate-Level Logic Synthesis Applications

Lee, Siang-YunRiener, HeinzDe Micheli, Giovanni2023-01-202023-01-202023-01-202022-07-18https://infoscience.epfl.ch/handle/20.500.14299/194106An Automated Testing and Debugging Toolkit for Gate-Level Logic Synthesis Applicationstext::conference output::conference paper not in proceedings