Mirzargar, Seyedeh ShararehRenault, GaiëtanGuerrieri, AndreaStojilovic, Mirjana2020-11-272020-11-272020-11-272020-12-0110.1109/ICFPT51103.2020.00050https://infoscience.epfl.ch/handle/20.500.14299/173679WOS:000676387300040In this work, we present an automated approach for locating power-wasting attackers in shared FPGAs. In this approach, the FPGA shell is responsible for, first, placing the user designs and, second, inserting voltage sensors in a nonintrusive and adaptive manner. We derive a metric for comparing transient voltage fluctuations recorded at different sensor locations and use it to locate the source of the highest disturbance. We implement and test our approach on a Xilinx Virtex-7 FPGA. In all our experiments, we successfully locate the attacker.text::conference output::conference proceedings::conference paper