Implementation of a Low-Power 200 MSample/s 12-bit Pipelined ADC Macro Using Deep-Submicron Digital CMOS Technology

Toprak, Z.Leblebici, Y.2005-08-302005-08-302005-08-302002https://infoscience.epfl.ch/handle/20.500.14299/215706Implementation of a Low-Power 200 MSample/s 12-bit Pipelined ADC Macro Using Deep-Submicron Digital CMOS Technologytext::conference output::conference paper not in proceedings