FOSS EKV2.6 Verilog-A Compact MOSFET Model

Grabinski, WladekPavanello, Marcelode Souza, MichellyTomaszewski, DanielMalesinska, JolaGluszko, GrzegorzBucher, MatthiasMakris, NikolaosNikolaou, AristeidisAbo-Elhadid, AhmedMierzwinski, MarekLemaitre, LaurentBrinson, MikeLallement, ChristopheSallese, Jean-MichelYoshitomi, SadayukiMalisse, PaulOguey, HenriCserveny, StefanEnz, ChristianKrummenacher, FrancoisVittoz, Eric2020-04-082020-04-082020-04-082019-01-0110.1109/ESSDERC.2019.8901822https://infoscience.epfl.ch/handle/20.500.14299/168039WOS:000520409500048The EKV2.6 MOSFET compact model has had a considerable impact on the academic and industrial community of analog integrated circuit design, since its inception in 1996. The model is available as a free open-source software (FOSS) tool coded in Verilog-A. The present paper provides a short review of foundations of the model and shows its capabilities via characterization and modeling based on a test chip in 180 nm CMOS fabricated via Europractice.Engineering, Electrical & ElectronicEngineeringekv2.6 modelcompact/spice modelverilog-aFOSS EKV2.6 Verilog-A Compact MOSFET Modeltext::conference output::conference proceedings::conference paper