Advanced CMOS Circuits for Multi-Gb/s Links and 3D I/O Based on Through Silicon Via Technology

Leblebici, YusufIenne, PaoloCevrero, Alessandro2014-05-122014-05-12201410.5075/epfl-thesis-6112https://infoscience.epfl.ch/handle/20.500.14299/103270urn:nbn:ch:bel-epfl-thesis6112-1encapactive-DACCMOS-postprocessingchip-multiprocessor (CMP)cross-DFE (XDFE)cross-CTLE (XCTLE)Cu electroplatingcontinuous-time linear equalizer (CTLE)deep reactive ion etching (DRIE)decision-feedback equalizer (DFE)delayed decision-feedback sequence estimator (DDFSE)Ethernetfar-end-crosstalk (FEXT) cancellationlow-density parity-check (LDPC) decodermaximum-likelihood-sequence estimator (MLSE)single ended I/OSOI-CMOSsource-synchronous linkswitched-capacitor (SC) DFEthrough silicon via (TSV)3D integration60 GHz wireless communication10GBASE-TAdvanced CMOS Circuits for Multi-Gb/s Links and 3D I/O Based on Through Silicon Via Technologythesis::doctoral thesis