Shirinzadeh, SSoeken, MGaillardon, PEDrechsler, R2018-11-082018-11-082018-11-08201810.1109/TCAD.2017.2750064https://infoscience.epfl.ch/handle/20.500.14299/150519WOS:000435558600009Logic Synthesis for RRAM-Based In-Memory Computingtext::journal::journal article::research article