Alper, CPadilla, JLPalestri, PIonescu, AM2018-11-082018-11-082018-11-08201810.1109/JEDS.2017.2758018https://infoscience.epfl.ch/handle/20.500.14299/149766WOS:000423582900001A Novel Reconfigurable Sub-0.25-V Digital Logic Family Using the Electron-Hole Bilayer TFETtext::journal::journal article::research article