Kim, GainKull, LukasLuu, DannyBraendli, MatthiasMenolfi, ChristianFrancese, Pier-AndreaYueksel, HazarAprile, CosimoMorf, ThomasKossel, MarcelCevrero, AlessandroOzkaya, IlterBurg, AndreasToifl, ThomasLeblebici, Yusuf2020-03-032020-03-032020-03-032020-01-0110.1109/JSSC.2019.2938414https://infoscience.epfl.ch/handle/20.500.14299/166824WOS:000505792900005This article introduces a wireline receiver (RX) data-path employing discrete multi-tone (DMT) modulation for communicating over electrical links. The DMT RX incorporates a fully digital equalization data-path, with a synthesized and automatically placed and routed digital signal processor (DSP) following a 10-bit time-interleaved pipelined successive-approximation register analog-to-digital converter (TI-PISAR ADC). The prototype RX chip implemented in a 14-nm FinFET process demonstrates a lane data rate of 56 Gb/s dissipating 161 mW including the ADC and the DSP power. The energy efficiency of 1.2 pJ/b for the DSP and 2.9 pJ/b for the entire RX was achieved with the data-rate of 56 Gb/s for communicating over channels exhibiting up to 28-dB loss at 14 GHz with a bit-error-rate (BER) better than 2e-4.Engineering, Electrical & ElectronicEngineeringbandwidthquadrature amplitude modulationofdmtime-domain analysisdiscrete fourier transformsreceiversdiscrete multi-tone (dmt)inter-symbol interference (isi)orthogonal frequency-division multiplexing (ofdm)receiverserdesserial-data transceiverwirelineserial data transceiverpam4A 161-mW 56-Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14-nm FinFETtext::journal::journal article::research article