Badel, StéphaneHatirnaz, IlhanLeblebici, Yusuf2005-12-202005-12-202005-12-202005https://infoscience.epfl.ch/handle/20.500.14299/221384WOS:000234682000090This paper describes the design and semi-automated generation of a MOS current-mode logic standard cell library. A set of generic components implementing a wide range of combinational and sequential functions is proposed. The layout of the generic components being parameterized for process design rules and transistor dimensions, the library can be mapped to different generations of CMOS processes. An implementation in 0.18um CMOS technology is presented.MOS Current-Mode LogicStandard-Cell LibraryDesign Automationtext::conference output::conference proceedings::conference paper