Nagel, I.Fabre, L.Pastre, M.Krummenacher, F.Cherkaoui, R.Kayal, M.2012-08-242012-08-242012-08-24201210.1049/e1.2012.1015https://infoscience.epfl.ch/handle/20.500.14299/85075WOS:000306707700030Presented is a transistor-level implementation of a floating and tunable CMOS active inductor. It is based on the classical gyrator-C topology and is enhanced by adding an internal offset reduction mechanism to guarantee functionality also for unbalanced DC conditions. The realised inductance can be programmed for values between 685 mu H and 12.4 mH and is designed to be implemented using standard CMOS technology. Its range of operation is from 250 to 750 kHz and the inductor consumption does not exceed 2 mW.text::journal::journal article::research article