Tsamados, DimitriosSingh Chauhan, YogeshEggimann, ChristophAkarvardar, KeremPhilip Wong, H. S.Mihai Ionescu, Adrian2010-01-082010-01-082010-01-08200810.1016/j.sse.2008.04.013https://infoscience.epfl.ch/handle/20.500.14299/45164WOS:000259688300018This paper proposes, the investigation of the Suspended Gate Field-Effect Transistor (SG-FET) small-slope switch based on a hybrid numerical simulation approach combining ANSYSTM Multiphysics and ISE-DESSISTM in a self-consistent system. The proposed numerical simulations uniquely enable the investigation of the behavior and the physics of complex micro-electro-mechanical/solid-state devices, such as the SG-FET. Abrupt switching as well as the effect of trapped charges in the gate dielectric are demonstrated. The numerical data serve to calibrate an analytical EKV-based SG-FET model, which is then used to design and originally simulate a sub-micron (90 nm) scaled SG-FET complementary inverter. It is shown that, due to abrupt switching in the subthreshold region and electro-mechanical hysteresis, the SG-FET inverter could deliver a significant power saving (1-2 decades reduction of inverter peak current and practically no leakage power) compared to traditional CMOS inverter.Suspended Gate-Field-Effect TransistorMEMS/NEMSComputational modeling and simulationLow powerMicro-electro-mechanical switchtext::journal::journal article::research article