De Michielis, L.Lattanzio, L.Palestri, P.Selmi, L.Ionescu, A. M.2012-01-192012-01-192012-01-19201110.1109/DRC.2011.5994440https://infoscience.epfl.ch/handle/20.500.14299/76784The Tunnel-FET (TFET) device is a gated reverse biased p-i-n junction whose working principle is based on the quantum mechanical Band-to-Band Tunneling (B2BT) mechanism [1]. The OFF-ON transition can be much more abrupt than for conventional MOSFETs, thus allowing a reduction of the supply voltage and power consumption in logic applications [2]. Several TFETs with point Subthreshold Swing (SS) lower than 60mV/dec have been experimentally demonstrated with different architectures as conventional single gate Silicon-on-Insulator (SOI), Double Gate (DG) and Gate-All-Around (GAA) [3,4]. Unfortunately in all cases a relatively large average SS and a poor on-current have been observed. © 2011 IEEE.FP7 STEEPERTunnel FETTFETtext::conference output::conference proceedings::conference paper