Volos, StavrosJevdjic, DjordjeFalsafi, BabakGrot, Boris2017-07-102017-07-102017-07-10201710.1109/MM.2017.32https://infoscience.epfl.ch/handle/20.500.14299/139170WOS:000401726500011The authors propose a high-capacity cache architecture that leverages emerging high-bandwidth memory modules. High-capacity caches capture the secondary data working sets of scale-out workloads while uncovering significant spatiotemporal locality across data objects. Unlike state-of-theart dram caches employing in-memory block-level metadata, the proposed cache is organized in pages, enabling a practical tag array, which can be implemented in the logic die of the high-bandwidth memory modules.text::journal::journal article::research article