Burg, A.Borgmann, M.Wenk, M.Studer, C.Boelcskei, H.2011-06-062011-06-062011-06-06200610.1109/DATE.2006.243974https://infoscience.epfl.ch/handle/20.500.14299/68362WOS:000243721600120We describe the VLSI implementation of MIMO detectors that exhibit close-to optimum error-rate performance, but still achieve high throughput at low silicon area. In particular algorithms and VLSI architectures for sphere decoding (SD) and K-best detection are considered, and the corresponding trade-offs between uncoded error-rate performance, silicon area, and throughput are explored. We show that SD with a per-block run-time constraint is best suited for practical implementations.Latticetext::conference output::conference proceedings::conference paper