FPGA Design with Double-Gate Carbon Nanotube Transistors

Ben Jamaa, HaykelGaillardon, P.-E.Frégonèse, S.De Marchi, MicheleDe Micheli, GiovanniZimmer, T.O'Connor, I.Clermidy, Fabien2011-02-012011-02-012011-02-01201110.1149/1.3567706https://infoscience.epfl.ch/handle/20.500.14299/63850Double-gate carbon nanotube field effect transistors (DGCNTFETs) are novel devices showing an interesting property allowing to control the p- or n-type behavior during the device operation. This opens up the opportunity for novel design paradigms. Based on a compact physical model of these devices, we demonstrate the benefit of designing field-programmable gate arrays (FPGAs) using fine-grain DG-CNTFET logic blocs rather than traditional look-up tables and coarse-grain DG-CNTFET logic blocs. In particular, we show a reduction by 13% to 48% on average in terms of delay of FPGA benchmarks.FPGA Design with Double-Gate Carbon Nanotube Transistorstext::conference output::conference proceedings::conference paper