Tajalli, ArminVittoz, EricLeblebici, YusufBrauer, Elizabeth2007-07-252007-07-252007-07-25200710.1049/el:20071208https://infoscience.epfl.ch/handle/20.500.14299/9838WOS:00024928220000511651A novel approach for implementing MOS current-mode logic (MCML) circuits that can operate with ultra low bias currents is introduced. Measurements of test structures fabricated in 0.18 μm CMOS technology show that the proposed PMOS load device concept can be utilized successfully for bias currents as low as 1 nA, achieving sufficiently high gain (>3) over a wide frequency range.CMOS integrated circuit designSource coupled logicUltra low powerDigital circuitsSubthreshold source-coupled logicSCLSTSCLCurrent-mode loigcCMLCMOS integrated circutstext::journal::journal article::research article