Vouilloz, A.Declercq, M.Dehollain, C.2010-05-212010-05-212010-05-21200110.1109/4.9104832-s2.0-0035273830https://infoscience.epfl.ch/handle/20.500.14299/50285A low-power and low-voltage super-regenerative receiver operating at 1 GHz and implemented in a 0.35-μm CMOS process is described. The receiver includes an low-noise amplifier, a super-regenerative oscillator, an envelope detector, an AGC circuitry with sample/hold function, and a baseband amplifier. The die surface is equal to 0.25 mm2. The power consumption is less than 1.2 mW at VDD = 1.5 V. A 100-KHz saw tooth quench signal is used to achieve a rejection of -36 dB at 500 KHz from the central frequency.0.35 micron1 GHz1.5 V100 kHzAGC circuitbaseband amplifierdie surfaceenvelope detectorlow-noise amplifierlow-power CMOSpower consumptionsample/hold functionsawtooth quench signalsuper-regenerative receiverCMOS analogue integrated circuitsUHF integrated circuitsfield effect MMIClow-power electronicsmicrowave receiverssample and hold circuitsA low-power CMOS super-regenerative receiver at 1 GHztext::journal::journal article::research article