Annigoni, EleonoraJankovec, MarkoGalliano, FedericoLi, Heng YuPerret-Aebi, Laure-EmmanuelleTopic, MarkoSculati-Meillaud, FannyVirtuani, AlessandroBallif, Christophe2019-02-222019-02-222019-02-22201610.4229/EUPVSEC20162016-5BO.11.2https://infoscience.epfl.ch/handle/20.500.14299/154690We present a mathematical model to predict the effect of potential-induced degradation (PID) on the power output of c-Si modules in different climates. For the experimental part, we manufacture mini-modules made of two c-Si p-type cells, and use accelerated ageing laboratory testing performed at different combinations of stress factors (temperature, relative humidity, and voltage). By modeling the effect of each stress factor in a step-wise approach, we obtain a model for the PID at constant stress conditions, which agrees well with models that can be found in the literature for full-size modules. Our model is obtained complementing existing models by introducing a term that describes a linear dependence of module’s power degradation on the magnitude of the applied voltage. Since in field installations PV modules are connected in strings and exposed to different potential – and, therefore, stress – levels, this latter term is needed to approach real field conditions. Finally, we present the first attempts to model PID outdoor degradation in different climate conditions based on the proposed model and on the indoor-determined coefficients for the devices tested. The outdoor prediction model makes use of Typical Meteorological Year (TMY) data for a specific location.Potential induced degradationPIDModelingLifetimeCrystalline silicontext::conference output::conference proceedings::conference paper