Thirunarayanan, RaghavasimhanRuffieux, DavidScolari, NicolaEnz, Christian2017-01-242017-01-242017-01-24201610.1109/ESSCIRC.2016.7598259https://infoscience.epfl.ch/handle/20.500.14299/133429WOS:000386656300030This paper presents a low start-up latency Transmitter (TX) that can achieve FSK data rates of upto 51.4 Mb/s for deployment in duty cycled microsensor nodes. Utilizing a Phase Domain Digital Synthesizer with an FBAR frequency reference, this TX has a start-up latency of just 1.5 mu s. It has been integrated in a 65nm technology and outputs upto 3 dBm power. It achieves a phase noise of -110 dBc/Hz at 1 MHz offset and has a frequency coverage of 2.17 - 2.47 GHz. The power consumption of this TX (including the Digital Baseband) varies from 15 mW at 1.2 Mb/s to 21.4 mW at 51.4 Mb/s. At peak data rate, this leads to an Duty-Cycling-Energy/bit (which takes into account the start-up energy) of 500 pJ/b for transmitting packets of length 32 bytes. Moreover, the TX incorporates a Hybrid Requantizer circuit which helps to trade off in-band noise with the spurs due to the non-linearity induced Sigma Delta noise folding.Energy EfficiencyDuty CyclingFBARPhase Domain Digital SynthesizerHybrid Requantizertext::conference output::conference proceedings::conference paper