Dlugosz, Rafal TomaszTalaska, Tomasz2011-01-102011-01-102011-01-102010https://infoscience.epfl.ch/handle/20.500.14299/62834WOS:000283921500055A novel current-mode, binary-tree Min / Max circuit for application in analog neural networks and filters has been presented. In the proposed circuit input currents are first converted to step signals with equal amplitudes and different delays that are proportional to the values of these currents. In the second step these delays are compared using a set of time domain comparators in the binary tree structure that determine Min or Max signal. The circuit realized in the CMOS 0.18 μm process offers a precision of 99.5% at data rate of 2.5 MS/s and energy of 0.5 pJ per input.Min / Max operationsanalog neural networksnonlinear filtersCMOS implementationlow energy consumptiontext::journal::journal article::research article