Realization of Multiple Valued Logic and Memory by Hybrid SETMOS Architecture

Mahapatra, S.Ionescu, A. M.2007-05-162007-05-162007-05-16200510.1109/TNANO.2005.858602https://infoscience.epfl.ch/handle/20.500.14299/6954WOS:0002333411000097622Realization of Multiple Valued Logic and Memory by Hybrid SETMOS Architecturetext::journal::journal article::research article