Kim, GainGharibdoust, KiarashLeblebici, Yusuf2017-06-282017-06-282017-06-28201710.1109/PRIME.2017.7974167https://infoscience.epfl.ch/handle/20.500.14299/138669This paper presents a versatile and fast time-domain architectural modeling framework for high-speed serial data transceivers (TRX) that can employ various analog modulation schemes. We highlight a modeling of TRXs employing an analog multi-tone signaling, which is not straightforward to model and hard to optimize with conventional serial link modeling tools. A method to limit the computing system’s memory usage when simulating a data transmission of a long bit-stream, e.g., greater than 10 Mbits, is also described. The reliability of the modeling framework is proven by some comparisons with a highly-trusted commercial tool for a conventional TRX architecture.Serial-LinkAnalog Multi-Tone SignalingArchitectural ModelingAnalysis, Optimization, and Modeling of Analog Multi-Tone Serial Data Transceiverstext::conference output::conference proceedings::conference paper