Zhu, MinghuaMatioli, Elison2018-08-082018-08-082018-08-082018-05-1310.1109/ISPSD.2018.8393646https://infoscience.epfl.ch/handle/20.500.14299/147681WOS:000467075700058In this work, we demonstrate high-performance NMOS GaN-based logic gates including NOT, NAND, and NOR by integration of E/D-mode GaN MOSHEMTs on silicon substrates. The load-to-driver resistance ratio was optimized in these logic gates by using a multi-finger gate design of E-mode GaN MOSHEMT to increase the logic swing voltage and noise margins, and reduce the transition periods. State-of-the-art NMOS inverter was achieved with logic swing voltage of 4.93 V at a supply voltage of 5 V, low-input noise margin of 2.13 V and high-input noise margin of 2.2 V at room temperature. Excellent high temperature performance, at 300 C, was observed with a logic swing of 4.85 V, low-input noise margin of 1.85 V and high output noise margin of 2.2V. In addition, GaN-based NAND and NOR NMOS logic gates are reported for the first time with very good performance. Finally, the logic gates were monolithically integrated with high-voltage E-mode power transistors, which reveals a significant step forward towards monolithic integration of GaN power transistors with gate drivers.text::conference output::conference proceedings::conference paper