Conception And Design Of A RISC CPU For The Use As Embedded Controller Within A Parallel Multimedia Architecture

Dogimont, S.Gumm, M.Mombers, F.2006-06-142006-06-142006-06-14199710.1109/ASAP.1997.606846https://infoscience.epfl.ch/handle/20.500.14299/230938LTS3Databases and Information SystemsConception And Design Of A RISC CPU For The Use As Embedded Controller Within A Parallel Multimedia Architecturetext::conference output::conference proceedings::conference paper