Weak Inversion Performance of CMOS and DCVSPG Logic Families in Sub-300mV Range
Akgun, Omer Can; Leblebici, Yusuf
2006

Files

Abstract

In this paper the advantages of using Differential Cascode Voltage Switch Pass Gate (DCVSPG) logic with regard to standard CMOS for subthreshold operation are presented. The two families are compared in terms of their performance and Energy-Delay-Product (EDP) figures. Multiple gates were simulated using 0.18µm standard CMOS technology. Simulation results show that DCVSPG NAND2 gate has 71%, DCVSPG NOR2 gate has 82% and DCVSPG full adder has 66% EDP savings over the CMOS counterparts.

Details

Title Weak Inversion Performance of CMOS and DCVSPG Logic Families in Sub-300mV Range
Author(s) Akgun, Omer Can ; Leblebici, Yusuf
Published in Proceedings of the International Symposium on Circuits and Systems
Pages 1251-1254
Conference IEEE International Symposium on Circuits and Systems (ISCAS), Island of Kos, Greece, May 21-25
Date 2006
Keywords
DOI https://doi.org/10.1109/ISCAS.2006.1692819
Other identifier(s) View record in Web of Science
Additional link URL
Laboratories LSM
Record Appears in Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > LSM - Microelectronic Systems Laboratory
Peer-reviewed publications
Conference Papers
Work produced at EPFL
Published
Record creation date 2006-07-12

Actions

Preview