EPICURE : A Partitioning and CoDesign Framework For Reconfigurable Computing
This paper presents a new global design methodology capable to bridge the gap between an abstract specification level and a heterogeneous reconfigurable architecture level. The Epicure contribution is the result of a joint study on abstraction/refinement methods and a smart reconfigurable architecture within the formal Esterel design tools suite. The original points of this work are : i) a generic HW/SW interface model, ii) a specification methodology that handles the control, includes efficient verification and HW/SW synthesis capabilities, iii) a method for parallelism exploration based on abstract resources/performance estimation expressed in terms of area/delay tradeoffs, iv) a HW/SW partitioning approach that refines the specification into explicit HW configurations and the associated SW control. The Epicure framework shows how a cooperation of complementary methodologies and CAD tools associated with a relevant architecture can significantly improve the designer productivity, especially in the context of reconfigurable architectures.
Keywords: design productivity. ; Design space exploration ; Formal programming model ; Hardware/Software partitioning ; LTS2 ; Parallelism exhibition and functional estimation ; Reconfigurable computing ; Smart HW/SW interface
Record created on 2006-06-14, modified on 2016-08-08