Mapping and Configuration Methods for Multi-Use-Case Networks on Chips

To provide a scalable communication infrastructure for Systems on Chips (SoCs), Networks on Chips (NoCs), a communication centric design paradigm is needed. To be cost effective, SoCs are often programmable and integrate several different applications or use-cases on to the same chip. For the SoC platform to support the different use-cases, the NoC architecture should satisfy the performance constraints of each individual use-case. In this work we motivate the need to consider multiple use-cases during the NoC design process. We present a method to ef ciently map the applications on to the NoC architecture, satisfying the design constraints of each individual use-case. We also present novel ways to dynamically recon- gure the network across the different use-cases and explore the possibility of integrating Dynamic Voltage and Frequency Scaling (DVS/DFS) techniques with the use-case centric NoC design methodology. We validate the performance of the design methodology on several SoC applications. The dynamic recon guration of the NoC integrated with DVS/DFS schemes results in large power savings for the resulting NoC systems.


Published in:
Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC), 1, 146-151
Presented at:
Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, January 24-27, 2006
Year:
2006
ISBN:
0-7803-9451-8
Keywords:
Laboratories:




 Record created 2006-02-22, last modified 2018-01-27

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