Towards a Unified Top-Down Design Flow for Fully-Differential Logic Blocks with Improved Speed and Noise Immunity

A new top-down design flow (RTL-to-GDSII) is proposed for achieving high-performance and noiseimmune designs consisting of differential logic blocks. The differential building blocks are based on the currentmode logic (CML), which offers true differentiality with low-swing signalling, switching-independent constant power dissipation and very high-speed operation. The goal of this flow is to allow effective cancellation of inductive and capacitive noise in high-speed on-chip interconnect lines using a simple generic interconnect architecture.


Published in:
Proceedings of PhD Research in Micro-Electronics and Electronics (PRIME), I, 63-66
Presented at:
PhD Research in Micro-Electronics and Electronics (PRIME), Lausanne, Switzerland, July 25-28
Year:
2005
Keywords:
Laboratories:




 Record created 2005-12-06, last modified 2018-03-17

n/a:
Download fulltextPDF
External link:
Download fulltextURL
Rate this document:

Rate this document:
1
2
3
 
(Not yet reviewed)