Single-Electron Circuit for Inhibitory Spiking Neural Network with Fault-Tolerant Architecture
2005
Details
Title
Single-Electron Circuit for Inhibitory Spiking Neural Network with Fault-Tolerant Architecture
Author(s)
Oya, Takahide ; Schmid, Alexandre ; Asai, Tetsuya ; Leblebici, Yusuf ; Amemiya, Yoshihito
Published in
proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS’05)
Volume
3
Pages
2535-2538
Conference
IEEE International Symposium on Circuits and Systems ISCAS’05, Kobe, Japan, May 23-26
Date
2005
Laboratories
LSM
Record Appears in
Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > LSM - Microelectronic Systems Laboratory
Peer-reviewed publications
Conference Papers
Work produced at EPFL
Published
Peer-reviewed publications
Conference Papers
Work produced at EPFL
Published
Record creation date
2005-11-21