Infoscience

Conference paper

A compact modular architecture for the realization of high-speed binary sorting engines based on rank ordering

    Note:

    Presented at the 2000 IEEE International Symposium on Circuits and Systems, May 2000, Geneva, Switzerland

    Reference

    • LSM-CONF-2000-004

    Record created on 2005-08-30, modified on 2016-08-08

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