A Novel Circuit-Level Fault-Tolerance Concept for Boolean Gates Using Low-Yield Nanometer-Scale Transistors
2004
Details
Title
A Novel Circuit-Level Fault-Tolerance Concept for Boolean Gates Using Low-Yield Nanometer-Scale Transistors
Author(s)
Schmid, A. ; Leblebici, Y.
Conference
2004 International Joint Conference on Neural Networks, Budapest, July 2004
Date
2004
Note
2004 International Joint Conference on Neural Networks, Budapest, July 2004
Laboratories
LSM
Record Appears in
Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > LSM - Microelectronic Systems Laboratory
Conference Papers
Work produced at EPFL
Published
Conference Papers
Work produced at EPFL
Published
Record creation date
2005-08-30