A Highly Fault-Tolerant PLA Architecture for Realization of Boolean Functions Using Failure-Prone Nanometer-Scale Device Technologies


Presented at:
Midwest Symposium on Circuit and Systems MWSCAS 2004, Hiroshima, Japan, July 2004
Year:
2004
Laboratories:




 Record created 2005-08-30, last modified 2018-03-17


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