Infoscience

Conference paper

Sub-70ps Full Adder in MOS Current-Mode Logic Using 0.18um CMOS Technology

    Note:

    The IASTED International Conference on CIRCUITS, SIGNALS, AND SYSTEMS (CSS 2004) November 28 ­ December 1, 2004 Clearwater Beach, Florida, USA

    Reference

    • LSM-CONF-2004-004

    Record created on 2005-08-30, modified on 2016-08-08

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