Multi-Chip Implementation of a High-Speed Sorting Engine Based on Rank-Ordering
2004
Files
Details
Title
Multi-Chip Implementation of a High-Speed Sorting Engine Based on Rank-Ordering
Author(s)
Kalkan, O. ; Hanay, M. S. ; Hatirnaz, I. ; Leblebici, Y.
Published in
The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04
Volume
2
Pages
257-260
Conference
IEEE International Midwest Symposium on Circuit and Systems MWSCAS 2004, Hiroshima, Japan, July 2004
Date
2004
Laboratories
LSM
Record Appears in
Scientific production and competences > STI - School of Engineering > IEM - Institut d'Electricité et de Microtechnique > LSM - Microelectronic Systems Laboratory
Conference Papers
Work produced at EPFL
Published
Conference Papers
Work produced at EPFL
Published
Record creation date
2005-08-30