Multi-Chip Implementation of a High-Speed Sorting Engine Based on Rank-Ordering
2004
Files
Details
Title
Multi-Chip Implementation of a High-Speed Sorting Engine Based on Rank-Ordering
Author(s)
Kalkan, O. ; Hanay, M. S. ; Hatirnaz, I. ; Leblebici, Y.
Conference
IEEE International Midwest Symposium on Circuit and Systems MWSCAS 2004, Hiroshima, Japan, July 2004
Date
2004
Note
IEEE International Midwest Symposium on Circuit and Systems MWSCAS 2004, Hiroshima, Japan, July 2004
Laboratories
LSM