Multi-Chip Implementation of a High-Speed Sorting Engine Based on Rank-Ordering
Kalkan, O.; Hanay, M. S.; Hatirnaz, I.; Leblebici, Y.
2004

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Title Multi-Chip Implementation of a High-Speed Sorting Engine Based on Rank-Ordering
Author(s) Kalkan, O. ; Hanay, M. S. ; Hatirnaz, I. ; Leblebici, Y.
Conference IEEE International Midwest Symposium on Circuit and Systems MWSCAS 2004, Hiroshima, Japan, July 2004
Date 2004
Note IEEE International Midwest Symposium on Circuit and Systems MWSCAS 2004, Hiroshima, Japan, July 2004
Laboratories LSM
Record Appears in Scientific production and competences > STI - School of Engineering > IEL - Institute of Electrical Engineering > LSM - Microelectronic Systems Laboratory
Conference Papers
Work produced at EPFL
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