A framework supported by a set of tools for turning digital signal processing algorithms into custom chips is proposed. The framework, called MOVAL, integrates analysis, layout synthesis and validation and is based on a structured top-down design methodology covering seven succinct abstraction levels: the behavioral, data representation, space/time, hardware, symbolic and geometric (mask) descriptions, and the chip. The top four levels efficiently cope with the implementation trade-offs and are all written in the same high level language, currently “C”. As a result, the design can be modeled using a mixture of components defined at different abstraction levels. This allows an efficient mixed-mode multi-level validation. The hardware description is unambiguous and is the key to (semi-) automatic synthesis of the layout. Furthermore, it generates test vectors for the symbolic layout, the mask and, finally, the chip. The validation is done automatically, based on back substitution. As an example of the proposed design methodology, the crucial steps of the implementation of a fast Fourier cosine transform algorithm are described.