Integration and modeling of ferroelectric devices in a standard CMOS porcess for low power non-volatile memories

The present work analyzes the impact of ferroelectric materials like PZT when integrated in a standard 0.5µm CMOS process in order to realize nonvolatile memories. The project has been initiated conjointly by the Swiss Federal Institute of Technology of Lausanne (EPFL) and our industrial partner EM Microelectronic Marin. As part of this study, a specific test and measurement circuit layout has been developed, integrating on a same silicon surface, classical CMOS devices and circuits specifically oriented toward the realization of nonvolatile memories. On the basis of this layout, exhaustive measurements have been carried out. These latter include several classical techniques, well adapted to the follow-up of electrical and physical characteristics, that take place throughout the technological process steps constituting the process in its whole. More specific measurement techniques are presented and results of measurements throughout the technological steps are analyzed. Among them, the Charge Pumping (CP) constitutes, as far as we know, an original method in the field of a study on the effects of ferroelectric materials on a standard CMOS process. Measurement results are presented and analyzed throughout the process steps and provide encouraging results. A major problem has however been raised, namely the anneals in presence of hydrogen. necessary for CMOS electronic devices, however degrading the ferroelectric capacitor characteristics. On the other hand, the initial properties of these devices can he recovered with thermal anneals in presence of oxygen, but in turn these latter are degrading CMOS devices. Solutions quoted from scientific publications are proposed and discussed. A compact model of the hysteretic behavior in ferroelectric materials has been developed in parallel with the project, based on the Preisach theory and on an analytical formulation deduced from a simple and empirical mathematical function. This work. as well as its extension for a ferroelectric transistor model, are presented as they appear in the scientific reviews "Solid State Electronics" and "Transaction on Electronic Devices" respectively.

    Thèse École polytechnique fédérale de Lausanne EPFL, n° 2777 (2005)
    Section de génie électrique et électronique
    Faculté des sciences et techniques de l'ingénieur
    Institut de génie électrique et électronique
    Laboratoire d'électronique générale 1
    Jury: Rainer Bruchhaus, Christophe Lallement, Juan Ramon Mosig, Philippe Renaud, Jean-Michel Sallèse

    Public defense: 2005-4-22


    Record created on 2005-03-16, modified on 2016-08-08


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