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Title
Génération du layout de circuits intégrés analogiques assistée par ordinateur
Author(s)
Kayal, Maher
Advisor(s)
Pagination
156
Date
1989
Publisher
Lausanne, EPFL
Language
French
Laboratories
LEG1
Record Appears in
Scientific production and competences > STI - School of Engineering > STI Archives > LEG1 - Electronics Laboratory 1
Scientific production and competences > EPFL Theses
Work produced at EPFL
Published
Theses
Scientific production and competences > EPFL Theses
Work produced at EPFL
Published
Theses
Record creation date
2005-03-16